Cambridge A Level ยท 9608 ยท Paper 1 ยท Theory fundamentals
Computer Science 9608/13 May/June 2015 past paper
Cambridge A Level Computer Science (9608) (previous syllabus, now 9618) Paper 1 (Theory fundamentals), variant 3, May/June 2015: the question paper and its official mark scheme, 7 questions worth 75 marks, with the grade thresholds. Free to open, no account needed.
- Questions
- 7
- Marks
- 75
- Grade A from
- 51
File names: 9608_s15_qp_13 ยท 9608_s15_ms_13
Grade thresholds for 9608/13 May/June 2015
The minimum raw marks Cambridge set for each grade on this component (out of 75). Thresholds change every session and variant, so always compare your score with the paper you actually sat.
| A | B | C | D | E |
|---|---|---|---|---|
| 51 | 44 | 38 | 32 | 27 |
Topics in this paper
Which syllabus chapters 9608/13 May/June 2015 tested, by marks. Each chapter links to every past-paper question on it.
| Chapter | Questions | Marks |
|---|---|---|
| Processor Fundamentals | 2 | 30 |
| Hardware | 2 | 22 |
| Security, privacy and data integrity | 1 | 11 |
| Information representation | 1 | 7 |
| System Software | 1 | 5 |
Questions in 9608/13 May/June 2015
- Question 1
(a) (i) Using twoโs complement, show how the following denary numbers could be stored in an 8-bit register: 124 โ77 (ii) Convert the two numbers in part (a) (i) into hexadecimal. โฆ
- Question 2
Assemblers translate from assembly language to machine code. Some assemblers scan the assembly language program twice; these are referred to as two-pass assemblers. The following table shows five activities performed by two-pass assemblers. Write 1 or 2 to indicate whether โฆ
- Question 3
(a) Give the definition of the terms firewall and authentication. Explain how they can help with the security of data. Firewall Authentication (b) Describe two differences between data integrity and data security. (c) Data integrity is required at the input โฆ
- Question 4
(a) There are two types of RAM: dynamic RAM (DRAM) and static RAM (SRAM). Five statements about DRAM and SRAM are shown below. Draw a line to link each statement to the appropriate type of RAM. Statement Type of RAM โฆ
- Question 5
(a) Name and describe three buses used in the von Neumann model. Bus 1 Description Bus 2 Description Bus 3 Description (b) The sequence of operations shows, in register transfer notation, the fetch stage of the fetch- execute cycle. 1 โฆ
- Question 6
(a) Three digital sensors A, B and C are used to monitor a process. The outputs from the sensors are used as the inputs to a logic circuit. A signal, X, is output from the logic circuit: logic circuit A โฆ
- Question 7
The table shows assembly language instructions for a processor which has one general purpose register, the Accumulator (ACC). Instruction Explanation Op code Operand LDD <address> Direct addressing. Load contents of given address to ACC STO <address> Store the contents of โฆ
Other Computer Science papers from May/June 2015
- 9608/11 Theory fundamentals
- 9608/12 Theory fundamentals
- 9608/21 Fundamental problem-solving & programming
- 9608/22 Fundamental problem-solving & programming
- 9608/23 Fundamental problem-solving & programming
- 9608/31 Advanced theory
- 9608/32 Advanced theory
- 9608/33 Advanced theory
- 9608/41 Further problem-solving & programming
- 9608/42 Further problem-solving & programming
- 9608/43 Further problem-solving & programming